
arpsender:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400778 <_init>:
  400778:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40077c:	910003fd 	mov	x29, sp
  400780:	9400005a 	bl	4008e8 <call_weak_fn>
  400784:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400788:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400790 <.plt>:
  400790:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400794:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x10180>
  400798:	f947fe11 	ldr	x17, [x16, #4088]
  40079c:	913fe210 	add	x16, x16, #0xff8
  4007a0:	d61f0220 	br	x17
  4007a4:	d503201f 	nop
  4007a8:	d503201f 	nop
  4007ac:	d503201f 	nop

00000000004007b0 <sendto@plt>:
  4007b0:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  4007b4:	f9400211 	ldr	x17, [x16]
  4007b8:	91000210 	add	x16, x16, #0x0
  4007bc:	d61f0220 	br	x17

00000000004007c0 <exit@plt>:
  4007c0:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  4007c4:	f9400611 	ldr	x17, [x16, #8]
  4007c8:	91002210 	add	x16, x16, #0x8
  4007cc:	d61f0220 	br	x17

00000000004007d0 <perror@plt>:
  4007d0:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  4007d4:	f9400a11 	ldr	x17, [x16, #16]
  4007d8:	91004210 	add	x16, x16, #0x10
  4007dc:	d61f0220 	br	x17

00000000004007e0 <inet_ntoa@plt>:
  4007e0:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  4007e4:	f9400e11 	ldr	x17, [x16, #24]
  4007e8:	91006210 	add	x16, x16, #0x18
  4007ec:	d61f0220 	br	x17

00000000004007f0 <__libc_start_main@plt>:
  4007f0:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  4007f4:	f9401211 	ldr	x17, [x16, #32]
  4007f8:	91008210 	add	x16, x16, #0x20
  4007fc:	d61f0220 	br	x17

0000000000400800 <htons@plt>:
  400800:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400804:	f9401611 	ldr	x17, [x16, #40]
  400808:	9100a210 	add	x16, x16, #0x28
  40080c:	d61f0220 	br	x17

0000000000400810 <close@plt>:
  400810:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400814:	f9401a11 	ldr	x17, [x16, #48]
  400818:	9100c210 	add	x16, x16, #0x30
  40081c:	d61f0220 	br	x17

0000000000400820 <bzero@plt>:
  400820:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400824:	f9401e11 	ldr	x17, [x16, #56]
  400828:	9100e210 	add	x16, x16, #0x38
  40082c:	d61f0220 	br	x17

0000000000400830 <__gmon_start__@plt>:
  400830:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400834:	f9402211 	ldr	x17, [x16, #64]
  400838:	91010210 	add	x16, x16, #0x40
  40083c:	d61f0220 	br	x17

0000000000400840 <abort@plt>:
  400840:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400844:	f9402611 	ldr	x17, [x16, #72]
  400848:	91012210 	add	x16, x16, #0x48
  40084c:	d61f0220 	br	x17

0000000000400850 <inet_pton@plt>:
  400850:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400854:	f9402a11 	ldr	x17, [x16, #80]
  400858:	91014210 	add	x16, x16, #0x50
  40085c:	d61f0220 	br	x17

0000000000400860 <socket@plt>:
  400860:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400864:	f9402e11 	ldr	x17, [x16, #88]
  400868:	91016210 	add	x16, x16, #0x58
  40086c:	d61f0220 	br	x17

0000000000400870 <strcpy@plt>:
  400870:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400874:	f9403211 	ldr	x17, [x16, #96]
  400878:	91018210 	add	x16, x16, #0x60
  40087c:	d61f0220 	br	x17

0000000000400880 <printf@plt>:
  400880:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400884:	f9403611 	ldr	x17, [x16, #104]
  400888:	9101a210 	add	x16, x16, #0x68
  40088c:	d61f0220 	br	x17

0000000000400890 <ioctl@plt>:
  400890:	d0000090 	adrp	x16, 412000 <sendto@GLIBC_2.17>
  400894:	f9403a11 	ldr	x17, [x16, #112]
  400898:	9101c210 	add	x16, x16, #0x70
  40089c:	d61f0220 	br	x17

Disassembly of section .text:

00000000004008a0 <_start>:
  4008a0:	d280001d 	mov	x29, #0x0                   	// #0
  4008a4:	d280001e 	mov	x30, #0x0                   	// #0
  4008a8:	aa0003e5 	mov	x5, x0
  4008ac:	f94003e1 	ldr	x1, [sp]
  4008b0:	910023e2 	add	x2, sp, #0x8
  4008b4:	910003e6 	mov	x6, sp
  4008b8:	580000c0 	ldr	x0, 4008d0 <_start+0x30>
  4008bc:	580000e3 	ldr	x3, 4008d8 <_start+0x38>
  4008c0:	58000104 	ldr	x4, 4008e0 <_start+0x40>
  4008c4:	97ffffcb 	bl	4007f0 <__libc_start_main@plt>
  4008c8:	97ffffde 	bl	400840 <abort@plt>
  4008cc:	00000000 	.inst	0x00000000 ; undefined
  4008d0:	0040099c 	.word	0x0040099c
  4008d4:	00000000 	.word	0x00000000
  4008d8:	00400d00 	.word	0x00400d00
  4008dc:	00000000 	.word	0x00000000
  4008e0:	00400d80 	.word	0x00400d80
  4008e4:	00000000 	.word	0x00000000

00000000004008e8 <call_weak_fn>:
  4008e8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x10180>
  4008ec:	f947f000 	ldr	x0, [x0, #4064]
  4008f0:	b4000040 	cbz	x0, 4008f8 <call_weak_fn+0x10>
  4008f4:	17ffffcf 	b	400830 <__gmon_start__@plt>
  4008f8:	d65f03c0 	ret
  4008fc:	00000000 	.inst	0x00000000 ; undefined

0000000000400900 <deregister_tm_clones>:
  400900:	d0000080 	adrp	x0, 412000 <sendto@GLIBC_2.17>
  400904:	91022000 	add	x0, x0, #0x88
  400908:	d0000081 	adrp	x1, 412000 <sendto@GLIBC_2.17>
  40090c:	91022021 	add	x1, x1, #0x88
  400910:	eb00003f 	cmp	x1, x0
  400914:	540000a0 	b.eq	400928 <deregister_tm_clones+0x28>  // b.none
  400918:	90000001 	adrp	x1, 400000 <_init-0x778>
  40091c:	f946d021 	ldr	x1, [x1, #3488]
  400920:	b4000041 	cbz	x1, 400928 <deregister_tm_clones+0x28>
  400924:	d61f0020 	br	x1
  400928:	d65f03c0 	ret
  40092c:	d503201f 	nop

0000000000400930 <register_tm_clones>:
  400930:	d0000080 	adrp	x0, 412000 <sendto@GLIBC_2.17>
  400934:	91022000 	add	x0, x0, #0x88
  400938:	d0000081 	adrp	x1, 412000 <sendto@GLIBC_2.17>
  40093c:	91022021 	add	x1, x1, #0x88
  400940:	cb000021 	sub	x1, x1, x0
  400944:	9343fc21 	asr	x1, x1, #3
  400948:	8b41fc21 	add	x1, x1, x1, lsr #63
  40094c:	9341fc21 	asr	x1, x1, #1
  400950:	b40000a1 	cbz	x1, 400964 <register_tm_clones+0x34>
  400954:	90000002 	adrp	x2, 400000 <_init-0x778>
  400958:	f946d442 	ldr	x2, [x2, #3496]
  40095c:	b4000042 	cbz	x2, 400964 <register_tm_clones+0x34>
  400960:	d61f0040 	br	x2
  400964:	d65f03c0 	ret

0000000000400968 <__do_global_dtors_aux>:
  400968:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40096c:	910003fd 	mov	x29, sp
  400970:	f9000bf3 	str	x19, [sp, #16]
  400974:	d0000093 	adrp	x19, 412000 <sendto@GLIBC_2.17>
  400978:	39422260 	ldrb	w0, [x19, #136]
  40097c:	35000080 	cbnz	w0, 40098c <__do_global_dtors_aux+0x24>
  400980:	97ffffe0 	bl	400900 <deregister_tm_clones>
  400984:	52800020 	mov	w0, #0x1                   	// #1
  400988:	39022260 	strb	w0, [x19, #136]
  40098c:	f9400bf3 	ldr	x19, [sp, #16]
  400990:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400994:	d65f03c0 	ret

0000000000400998 <frame_dummy>:
  400998:	17ffffe6 	b	400930 <register_tm_clones>

000000000040099c <main>:
  40099c:	a9b37bfd 	stp	x29, x30, [sp, #-208]!
  4009a0:	910003fd 	mov	x29, sp
  4009a4:	b9001fa0 	str	w0, [x29, #28]
  4009a8:	f9000ba1 	str	x1, [x29, #16]
  4009ac:	a908ffbf 	stp	xzr, xzr, [x29, #136]
  4009b0:	a909ffbf 	stp	xzr, xzr, [x29, #152]
  4009b4:	f90057bf 	str	xzr, [x29, #168]
  4009b8:	790163bf 	strh	wzr, [x29, #176]
  4009bc:	b90033bf 	str	wzr, [x29, #48]
  4009c0:	79006bbf 	strh	wzr, [x29, #52]
  4009c4:	90000000 	adrp	x0, 400000 <_init-0x778>
  4009c8:	9139e001 	add	x1, x0, #0xe78
  4009cc:	9100a3a0 	add	x0, x29, #0x28
  4009d0:	b9400022 	ldr	w2, [x1]
  4009d4:	b9000002 	str	w2, [x0]
  4009d8:	b8402021 	ldur	w1, [x1, #2]
  4009dc:	b8002001 	stur	w1, [x0, #2]
  4009e0:	b9401fa0 	ldr	w0, [x29, #28]
  4009e4:	71000c1f 	cmp	w0, #0x3
  4009e8:	54000100 	b.eq	400a08 <main+0x6c>  // b.none
  4009ec:	f9400ba0 	ldr	x0, [x29, #16]
  4009f0:	f9400001 	ldr	x1, [x0]
  4009f4:	90000000 	adrp	x0, 400000 <_init-0x778>
  4009f8:	9136c000 	add	x0, x0, #0xdb0
  4009fc:	97ffffa1 	bl	400880 <printf@plt>
  400a00:	52800020 	mov	w0, #0x1                   	// #1
  400a04:	97ffff6f 	bl	4007c0 <exit@plt>
  400a08:	52800060 	mov	w0, #0x3                   	// #3
  400a0c:	97ffff7d 	bl	400800 <htons@plt>
  400a10:	12003c00 	and	w0, w0, #0xffff
  400a14:	2a0003e2 	mov	w2, w0
  400a18:	52800061 	mov	w1, #0x3                   	// #3
  400a1c:	52800220 	mov	w0, #0x11                  	// #17
  400a20:	97ffff90 	bl	400860 <socket@plt>
  400a24:	b900cfa0 	str	w0, [x29, #204]
  400a28:	b940cfa0 	ldr	w0, [x29, #204]
  400a2c:	7100001f 	cmp	w0, #0x0
  400a30:	540000ca 	b.ge	400a48 <main+0xac>  // b.tcont
  400a34:	90000000 	adrp	x0, 400000 <_init-0x778>
  400a38:	91374000 	add	x0, x0, #0xdd0
  400a3c:	97ffff65 	bl	4007d0 <perror@plt>
  400a40:	52800020 	mov	w0, #0x1                   	// #1
  400a44:	97ffff5f 	bl	4007c0 <exit@plt>
  400a48:	9101c3a0 	add	x0, x29, #0x70
  400a4c:	d2800281 	mov	x1, #0x14                  	// #20
  400a50:	97ffff74 	bl	400820 <bzero@plt>
  400a54:	9100e3a0 	add	x0, x29, #0x38
  400a58:	d2800501 	mov	x1, #0x28                  	// #40
  400a5c:	97ffff71 	bl	400820 <bzero@plt>
  400a60:	f9400ba0 	ldr	x0, [x29, #16]
  400a64:	91002000 	add	x0, x0, #0x8
  400a68:	f9400001 	ldr	x1, [x0]
  400a6c:	9100e3a0 	add	x0, x29, #0x38
  400a70:	97ffff80 	bl	400870 <strcpy@plt>
  400a74:	9100e3a0 	add	x0, x29, #0x38
  400a78:	aa0003e2 	mov	x2, x0
  400a7c:	d2912661 	mov	x1, #0x8933                	// #35123
  400a80:	b940cfa0 	ldr	w0, [x29, #204]
  400a84:	97ffff83 	bl	400890 <ioctl@plt>
  400a88:	3100041f 	cmn	w0, #0x1
  400a8c:	540000c1 	b.ne	400aa4 <main+0x108>  // b.any
  400a90:	90000000 	adrp	x0, 400000 <_init-0x778>
  400a94:	91378000 	add	x0, x0, #0xde0
  400a98:	97ffff4e 	bl	4007d0 <perror@plt>
  400a9c:	52800020 	mov	w0, #0x1                   	// #1
  400aa0:	97ffff48 	bl	4007c0 <exit@plt>
  400aa4:	b9404ba0 	ldr	w0, [x29, #72]
  400aa8:	b90077a0 	str	w0, [x29, #116]
  400aac:	b9404ba1 	ldr	w1, [x29, #72]
  400ab0:	90000000 	adrp	x0, 400000 <_init-0x778>
  400ab4:	9137e000 	add	x0, x0, #0xdf8
  400ab8:	97ffff72 	bl	400880 <printf@plt>
  400abc:	9100e3a0 	add	x0, x29, #0x38
  400ac0:	aa0003e2 	mov	x2, x0
  400ac4:	d29122a1 	mov	x1, #0x8915                	// #35093
  400ac8:	b940cfa0 	ldr	w0, [x29, #204]
  400acc:	97ffff71 	bl	400890 <ioctl@plt>
  400ad0:	3100041f 	cmn	w0, #0x1
  400ad4:	540000c1 	b.ne	400aec <main+0x150>  // b.any
  400ad8:	90000000 	adrp	x0, 400000 <_init-0x778>
  400adc:	91384000 	add	x0, x0, #0xe10
  400ae0:	97ffff3c 	bl	4007d0 <perror@plt>
  400ae4:	52800020 	mov	w0, #0x1                   	// #1
  400ae8:	97ffff36 	bl	4007c0 <exit@plt>
  400aec:	9100e3a0 	add	x0, x29, #0x38
  400af0:	91004000 	add	x0, x0, #0x10
  400af4:	b9400400 	ldr	w0, [x0, #4]
  400af8:	b90063a0 	str	w0, [x29, #96]
  400afc:	9100e3a0 	add	x0, x29, #0x38
  400b00:	91004000 	add	x0, x0, #0x10
  400b04:	b9400400 	ldr	w0, [x0, #4]
  400b08:	97ffff36 	bl	4007e0 <inet_ntoa@plt>
  400b0c:	2a0003e1 	mov	w1, w0
  400b10:	90000000 	adrp	x0, 400000 <_init-0x778>
  400b14:	9138a000 	add	x0, x0, #0xe28
  400b18:	97ffff5a 	bl	400880 <printf@plt>
  400b1c:	9100e3a0 	add	x0, x29, #0x38
  400b20:	aa0003e2 	mov	x2, x0
  400b24:	d29124e1 	mov	x1, #0x8927                	// #35111
  400b28:	b940cfa0 	ldr	w0, [x29, #204]
  400b2c:	97ffff59 	bl	400890 <ioctl@plt>
  400b30:	3100041f 	cmn	w0, #0x1
  400b34:	540000c1 	b.ne	400b4c <main+0x1b0>  // b.any
  400b38:	90000000 	adrp	x0, 400000 <_init-0x778>
  400b3c:	9138e000 	add	x0, x0, #0xe38
  400b40:	97ffff24 	bl	4007d0 <perror@plt>
  400b44:	52800020 	mov	w0, #0x1                   	// #1
  400b48:	97ffff1e 	bl	4007c0 <exit@plt>
  400b4c:	9100c3a0 	add	x0, x29, #0x30
  400b50:	91012ba1 	add	x1, x29, #0x4a
  400b54:	b9400022 	ldr	w2, [x1]
  400b58:	b9000002 	str	w2, [x0]
  400b5c:	b8402021 	ldur	w1, [x1, #2]
  400b60:	b8002001 	stur	w1, [x0, #2]
  400b64:	3940c3a0 	ldrb	w0, [x29, #48]
  400b68:	2a0003e1 	mov	w1, w0
  400b6c:	3940c7a0 	ldrb	w0, [x29, #49]
  400b70:	2a0003e2 	mov	w2, w0
  400b74:	3940cba0 	ldrb	w0, [x29, #50]
  400b78:	2a0003e3 	mov	w3, w0
  400b7c:	3940cfa0 	ldrb	w0, [x29, #51]
  400b80:	2a0003e4 	mov	w4, w0
  400b84:	3940d3a0 	ldrb	w0, [x29, #52]
  400b88:	2a0003e5 	mov	w5, w0
  400b8c:	3940d7a0 	ldrb	w0, [x29, #53]
  400b90:	2a0003e6 	mov	w6, w0
  400b94:	90000000 	adrp	x0, 400000 <_init-0x778>
  400b98:	91394000 	add	x0, x0, #0xe50
  400b9c:	97ffff39 	bl	400880 <printf@plt>
  400ba0:	910223a0 	add	x0, x29, #0x88
  400ba4:	f90063a0 	str	x0, [x29, #192]
  400ba8:	f94063a0 	ldr	x0, [x29, #192]
  400bac:	aa0003e1 	mov	x1, x0
  400bb0:	9100a3a0 	add	x0, x29, #0x28
  400bb4:	b9400002 	ldr	w2, [x0]
  400bb8:	b9000022 	str	w2, [x1]
  400bbc:	b8402000 	ldur	w0, [x0, #2]
  400bc0:	b8002020 	stur	w0, [x1, #2]
  400bc4:	f94063a0 	ldr	x0, [x29, #192]
  400bc8:	91001800 	add	x0, x0, #0x6
  400bcc:	aa0003e1 	mov	x1, x0
  400bd0:	9100c3a0 	add	x0, x29, #0x30
  400bd4:	b9400002 	ldr	w2, [x0]
  400bd8:	b9000022 	str	w2, [x1]
  400bdc:	b8402000 	ldur	w0, [x0, #2]
  400be0:	b8002020 	stur	w0, [x1, #2]
  400be4:	528100c0 	mov	w0, #0x806                 	// #2054
  400be8:	97ffff06 	bl	400800 <htons@plt>
  400bec:	12003c01 	and	w1, w0, #0xffff
  400bf0:	f94063a0 	ldr	x0, [x29, #192]
  400bf4:	79001801 	strh	w1, [x0, #12]
  400bf8:	910223a0 	add	x0, x29, #0x88
  400bfc:	91003800 	add	x0, x0, #0xe
  400c00:	f9005fa0 	str	x0, [x29, #184]
  400c04:	52800020 	mov	w0, #0x1                   	// #1
  400c08:	97fffefe 	bl	400800 <htons@plt>
  400c0c:	12003c01 	and	w1, w0, #0xffff
  400c10:	f9405fa0 	ldr	x0, [x29, #184]
  400c14:	79000001 	strh	w1, [x0]
  400c18:	52810000 	mov	w0, #0x800                 	// #2048
  400c1c:	97fffef9 	bl	400800 <htons@plt>
  400c20:	12003c01 	and	w1, w0, #0xffff
  400c24:	f9405fa0 	ldr	x0, [x29, #184]
  400c28:	79000401 	strh	w1, [x0, #2]
  400c2c:	f9405fa0 	ldr	x0, [x29, #184]
  400c30:	528000c1 	mov	w1, #0x6                   	// #6
  400c34:	39001001 	strb	w1, [x0, #4]
  400c38:	f9405fa0 	ldr	x0, [x29, #184]
  400c3c:	52800081 	mov	w1, #0x4                   	// #4
  400c40:	39001401 	strb	w1, [x0, #5]
  400c44:	52800020 	mov	w0, #0x1                   	// #1
  400c48:	97fffeee 	bl	400800 <htons@plt>
  400c4c:	12003c01 	and	w1, w0, #0xffff
  400c50:	f9405fa0 	ldr	x0, [x29, #184]
  400c54:	79000c01 	strh	w1, [x0, #6]
  400c58:	f9405fa0 	ldr	x0, [x29, #184]
  400c5c:	91002000 	add	x0, x0, #0x8
  400c60:	aa0003e1 	mov	x1, x0
  400c64:	9100c3a0 	add	x0, x29, #0x30
  400c68:	b9400002 	ldr	w2, [x0]
  400c6c:	b9000022 	str	w2, [x1]
  400c70:	b8402000 	ldur	w0, [x0, #2]
  400c74:	b8002020 	stur	w0, [x1, #2]
  400c78:	f9405fa0 	ldr	x0, [x29, #184]
  400c7c:	91003800 	add	x0, x0, #0xe
  400c80:	b94063a1 	ldr	w1, [x29, #96]
  400c84:	b9000001 	str	w1, [x0]
  400c88:	f9400ba0 	ldr	x0, [x29, #16]
  400c8c:	91004000 	add	x0, x0, #0x10
  400c90:	f9400000 	ldr	x0, [x0]
  400c94:	9101a3a1 	add	x1, x29, #0x68
  400c98:	aa0103e2 	mov	x2, x1
  400c9c:	aa0003e1 	mov	x1, x0
  400ca0:	52800040 	mov	w0, #0x2                   	// #2
  400ca4:	97fffeeb 	bl	400850 <inet_pton@plt>
  400ca8:	f9405fa0 	ldr	x0, [x29, #184]
  400cac:	91006000 	add	x0, x0, #0x18
  400cb0:	b9406ba1 	ldr	w1, [x29, #104]
  400cb4:	b9000001 	str	w1, [x0]
  400cb8:	52800220 	mov	w0, #0x11                  	// #17
  400cbc:	7900e3a0 	strh	w0, [x29, #112]
  400cc0:	9101c3a1 	add	x1, x29, #0x70
  400cc4:	910223a0 	add	x0, x29, #0x88
  400cc8:	52800285 	mov	w5, #0x14                  	// #20
  400ccc:	aa0103e4 	mov	x4, x1
  400cd0:	52800003 	mov	w3, #0x0                   	// #0
  400cd4:	d2800542 	mov	x2, #0x2a                  	// #42
  400cd8:	aa0003e1 	mov	x1, x0
  400cdc:	b940cfa0 	ldr	w0, [x29, #204]
  400ce0:	97fffeb4 	bl	4007b0 <sendto@plt>
  400ce4:	b900b7a0 	str	w0, [x29, #180]
  400ce8:	b940cfa0 	ldr	w0, [x29, #204]
  400cec:	97fffec9 	bl	400810 <close@plt>
  400cf0:	52800000 	mov	w0, #0x0                   	// #0
  400cf4:	a8cd7bfd 	ldp	x29, x30, [sp], #208
  400cf8:	d65f03c0 	ret
  400cfc:	00000000 	.inst	0x00000000 ; undefined

0000000000400d00 <__libc_csu_init>:
  400d00:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400d04:	910003fd 	mov	x29, sp
  400d08:	a901d7f4 	stp	x20, x21, [sp, #24]
  400d0c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x10180>
  400d10:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x10180>
  400d14:	91374294 	add	x20, x20, #0xdd0
  400d18:	913722b5 	add	x21, x21, #0xdc8
  400d1c:	a902dff6 	stp	x22, x23, [sp, #40]
  400d20:	cb150294 	sub	x20, x20, x21
  400d24:	f9001ff8 	str	x24, [sp, #56]
  400d28:	2a0003f6 	mov	w22, w0
  400d2c:	aa0103f7 	mov	x23, x1
  400d30:	9343fe94 	asr	x20, x20, #3
  400d34:	aa0203f8 	mov	x24, x2
  400d38:	97fffe90 	bl	400778 <_init>
  400d3c:	b4000194 	cbz	x20, 400d6c <__libc_csu_init+0x6c>
  400d40:	f9000bb3 	str	x19, [x29, #16]
  400d44:	d2800013 	mov	x19, #0x0                   	// #0
  400d48:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400d4c:	aa1803e2 	mov	x2, x24
  400d50:	aa1703e1 	mov	x1, x23
  400d54:	2a1603e0 	mov	w0, w22
  400d58:	91000673 	add	x19, x19, #0x1
  400d5c:	d63f0060 	blr	x3
  400d60:	eb13029f 	cmp	x20, x19
  400d64:	54ffff21 	b.ne	400d48 <__libc_csu_init+0x48>  // b.any
  400d68:	f9400bb3 	ldr	x19, [x29, #16]
  400d6c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400d70:	a942dff6 	ldp	x22, x23, [sp, #40]
  400d74:	f9401ff8 	ldr	x24, [sp, #56]
  400d78:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400d7c:	d65f03c0 	ret

0000000000400d80 <__libc_csu_fini>:
  400d80:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400d84 <_fini>:
  400d84:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400d88:	910003fd 	mov	x29, sp
  400d8c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400d90:	d65f03c0 	ret
